As of noon, I've spent most of my morning as a volunteer at MICRO; however, I did slip in to hear the keynote and AMD's talk about an ISA extension for supporting transactional memory. Transactional memory (TM) is a technology of which I am deeply skeptical. But given that AMD's talk was from the ISA perspective rather than the HW itself, I gave it a go.
Their approach was to try and find the minimal set of instructions required to provide some meaningful TM functionality for programs. SPECULATE, COMMIT, and LOCK MOV are the three instructions. Furthermore, in providing minimal support, programs are not burdened by unnecessary overhead. For example, SPECULATE begins a speculative region (i.e., transaction), but only checkpoints the instruction and stack pointers.
Within this region, only the memory operations that are made with "LOCK MOV" are given transactional semantics. All other operations are non-speculative and therefore have normal semantics. This enables a speculative region to only incur the overhead from required operations and not from incidental work. And the HW support for transactions is reduced as fewer operations need to be tracked to provide sufficient support for applications.
COMMIT closes the speculative region and clears the transaction bits from the pending memory operations. If there is a conflict during the region, then the HW rolls back to the old RIP which has a trampoline to determine the appropriate fail behavior, like retry, etc.
This approach had far greater appeal to me than previous works. I think the minimalist approach is favorable from a performance standpoint. This approach also provides greater flexibility to use the TM support for other applications.
For more details see: AMD's ASF or the MICRO 43 proceedings (not yet available)
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